Power-gating reduces standby leakage power which improves battery lifetime for mobile devices. However, conventional power-gating have limitations. For example, with Metal Oxide Semiconductor Field Effect Transistors (MOSFETs), logic state is stored in always-powered memories or latches to avoid data loss during power-gating. This consumes power and increases complexity. Further, signals crossing from a power-gated domain to another powered domain requires isolation gates (or firewalls) to preserve correct circuit functionality. This incurs power, area, and delay overhead. Additionally, the above limitations are most severe when applying power-gating at more granular levels as would be needed to minimize leakage power. Thus, highly granular power-gating cannot be achieved with current transistor and circuit techniques.